Alper Yazar

Alper Yazar

Embedded Systems, FPGA, Linux

Principal Engineer @ ASELSAN

ayazar

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I earned my BSc and MSc degrees from the same department, METU EEE, in 2012 and 2015, respectively. My master’s thesis focused on statistical signal processing. As a PhD candidate, I worked on FPGA-accelerated cloud computing.

I’ve been passionate about electronics and computers since I was 10. Over the years, I’ve designed circuit boards and worked with FPGAs, SoCs, MCUs, and a variety of embedded platforms. I’ve developed software solutions using bare-metal, RTOS, and embedded Linux solutions. My work typically spans multiple layers of the stack - starting from schematics and hardware bring-up to the final application software running on Linux. Most of the time, an FPGA (Xilinx/AMD products, in general) is also part of that stack. I am interested in applying DevOps and CI/CD practices to embedded systems, especially FPGA development workflows.

That’s why I sometimes consider myself a Full Stack Electronics Engineer.

Besides technology, I also love music and musical instruments. 🎵

Contact ✉️

If you want to reach privately to me please send an e-mail:

ayazar[@} a ! p ! ! y ! ! ar /.$ com

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Professional Experience

  • Present - 2025, Principal Engineer, ASELSAN

  • 2025 - 2023, Senior Lead Engineer, ASELSAN

  • 2023 - 2020, Senior Expert Engineer, ASELSAN

  • 2021 - 2018, Project co-manager + Design Engineer, The ACCLOUD Project. ACCLOUD was a research project on FPGA accelerated cloud computing. The work was supported by TUBITAK and ASELSAN. I was one of the two project managers and responsible for architecture design + FPGA implementation (operational at 40 Gbps line rate).

  • 2020 - 2016, Expert Engineer, ASELSAN

  • 2016 - 2012, Engineer, ASELSAN

  • 2011, Intern, ASELSAN

  • 2010, Intern, Bosch Rexroth

Education

  • Not Completed, PhD, Electrical and Electronics Engineering. Middle East Technical University (METU), Ankara, Turkey.

    • Area of Study: Heterogeneous Architectures and Cloud

    • Thesis Topic: Reconfigurable and Composable Hardware Accelerators to Provide Quality of Service (QoS) in Cloud Computing

    • Advisor: Prof. Ece Güran Schmidt

    • Field: Computers

    • CGPA: 3.75/4.00

    • ℹ️ Began PhD studies in 2016, successfully passed the qualification exam, and progressed to the thesis stage before deciding to leave the program.

  • 2015, MSc, Electrical and Electronics Engineering. Middle East Technical University (METU), Ankara, Turkey.

  • 2012, BSc, Electrical and Electronics Engineering. Middle East Technical University (METU), Ankara, Turkey.

    • Specialization Fields: Computers and Telecommunications

    • CGPA: 3.93/4.00

Publication

alperyazar.bib

Note
 TR: in Turkish

Patent

Thesis

  • Yazar, A. (2015). Application of F-test method on model order selection and related problems (Master’s thesis, Middle East Technical University). Link PDF

Conference

  • Tırlıoğlu, A., Demir, Ö. B., Yazar, A., & Schmidt, E. G. (2021, June). Hardware Accelerators for Cloud Computing: Features and Implementation. In 2021 29th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU53274.2021.9478015 PDF TR

  • Yazıcı, F., Yıldız, A. S., Yazar, A., & Schmidt, E. G. (2020, November). A Novel Scalable On-chip Switch Architecture with Quality of Service Support for Hardware Accelerated Cloud Data Centers. In 2020 IEEE 9th International Conference on Cloud Networking (CloudNet) (pp. 1-4). IEEE. DOI: 10.1109/CloudNet51028.2020.9335788 PDF

  • Yazıcı, F., Yıldız, A. S., Yazar, A., & Schmidt, E. G. (2020, October). An On-chip Switch Architecture for Hardware Accelerated Cloud Computing Systems. In 2020 28th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU49456.2020.9302370 PDF TR

  • Erol, A., Yazar, A., & Schmidt, E. G. (2019, July). OpenStack Generalization for Hardware Accelerated Clouds. In 2019 28th International Conference on Computer Communication and Networks (ICCCN) (pp. 1-8). IEEE. DOI: 10.1109/ICCCN.2019.8847115 PDF

  • Ekici, N. U., Schmidt, K. W., Yazar, A., & Schmidt, E. G. (2019, July). Resource allocation for minimized power consumption in hardware accelerated clouds. In 2019 28th International Conference on Computer Communication and Networks (ICCCN) (pp. 1-8). IEEE. DOI: 10.1109/ICCCN.2019.8847159 PDF

  • Koltuk, F., Yazar, A., & Schmidt, E. G. (2019, April). Cloudgen: Workload generation for the evaluation of cloud computing systems. In 2019 27th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU.2019.8806358 PDF TR

  • Erol, A., Yazar, A., & Schmidt, E. G. (2019, April). A generalization of openstack for managing heterogeneous cloud resources. In 2019 27th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU.2019.8806551 PDF TR

  • Ekici, N. U., Schmidt, K. W., Yazar, A., & Schmidt, E. G. (2019, April). ACCLOUD-MAN - Power Efficient Resource Allocation for Heterogeneous Clouds. In 2019 27th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU.2019.8806247 PDF TR

  • Yazar, A. (2018). Bir Açık Kaynak Kodlu Gerçek Zamanlı İşletim Sistemi (FreeRTOS) ile Gömülü Yazılım Geliştirme Çalışmaları. In 2018 9th Savunma Teknolojileri Kongresi (SAVTEK) (pp. 1–8). Bildiri Sunum TR

  • Yazar, A., Erol, A., & Schmidt, E. G. (2018, May). ACCLOUD (Accelerated CLOUD): A novel FPGA-Accelerated cloud archictecture. In 2018 26th Signal Processing and Communications Applications Conference (SIU) (pp. 1-4). IEEE. DOI: 10.1109/SIU.2018.8404548 PDF

  • Yazar, A., & Candan, Ç. (2015, May). Analysis window length selection for linear signal models. In 2015 23nd Signal Processing and Communications Applications Conference (SIU) (pp. 1301-1304). IEEE. DOI: 10.1109/SIU.2015.7130078 PDF TR

Poster

  • Yazar, A. (2015, March). Model Order Selection Using F-Test. In 2015 METU EEE Graduate Research Workshop (GRW). METU. Poster Abstract

Lecture Notes

  • Yazar, A. (2017) Compiled Lecture Notes of EE533 Information Theory. PDF

  • Yazar, A. (2014) Compiled Lecture Notes of EE604 Sensor Array Signal Processing. PDF

Technical Notes, Blog

  • Yazar, A. (2025) FPGA, Git, DevOps, CI/CD. PDF TR

  • Yazar, A. (2024) MODBUS Notlarım. PDF TR

Project

Some of my public projects with no confidentiality restrictions.

Funded

  • ACCLOUD A Novel, FPGA-Accelerated Cloud Architecture Project co-manager + architect + design engineer. Completed Link

Hobby

  • EBox Embedded Box. Containerization of EDA tools GitHub

  • asynx.dev A platform especially for embedded + FPGA engineers. Dead

  • SSTBIOSProg Simple programmer for SST brand BIOS EEPROMs. Completed TODO: Add link

  • Sureli2Calibre Python script to add periodicals into an existing Calibre library. Completed GitHub

  • aPCmeter It is used to monitor CPU and RAM usage of a computer via vintage looking illuminated gauges. aPCmeter uses Arduino Nano v3 as controller. Completed Hackaday GitHub

  • Devre, Devreler devre.org and devreler.org projects Historic TODO: Add link TR

  • isoUSBRS422 isoUSBRS422 is an isolated USB - RS422/RS485 converter. It is designed using KiCad. Hackaday GitHub

  • NASuX RaspberryPi based NAS device Historic TODO: Add link

  • İBTÇ İlk Bilgisayarımı Tekrar Çalıştırma / Trying to fix and boot up my first PC from year 2000. Completed TODO: Add link

  • FPGA232KU FPGA RS 232 Kod Üretici / Small EXE written in Python to generate simple UART transceiver in VHDL. Completed GitHub

  • Soğuk Lehim soguklehim.com Historic TODO: Add link TR

  • Devreler Hakkında devrelerhakkinda.com Historic TODO: Add link TR

  • İzoyazılım izoyazilim.com Programming oriented version of my İzoelektronik project Historic TODO: Add link TR

  • Kapasitans e-magazine project on electronics Historic TODO: Add link TR

  • İzoelektronik izoelektronik.com Historic TODO: Add link TR

Class

PhD

  • EE542 Computer Networks. Evaluation and minor improvements on ClassBench

  • CENG513 Wireless Communication and Networks. A load balancing algorithm for multi-user multiple access point wireless networks

MSc

  • EE604 Sensor Array Signal Processing. Implementation and evaluation of two source localization methods on MATLAB: Triangulation and RSS

BSc

  • EE493, EE494 Engineering Design. Being a member of a team with four members, designed a voice controlled car capable of auto collision avoidance. Speech processing was done using MATLAB on a PC. Commands were transferred to car over RF channel. An RF communication protocol was developed top on FSK modulation.

  • EE430 Digital Signal Processing. Designed and implemented FSK based communication system over acoustic air channel using MATLAB and standard microphone/speaker of a PC.

  • EE314 Digital Electronics Laboratory. Designed clone of “Space Invaders” game on FPGA board with VGA output using Verilog as HDL an XilinX ISE tools.

  • EE313 Analog Electronics Laboratory. Designed an op-amp using discrete transistors and passives.

  • EE214 Electronic Circuits Laboratory. Designed a DC-DC boost converter using discrete components.

  • EE213 Electrical Circuits Laboratory. Designed RGB color sensor using OPAMPs and discrete components.

Attended Training

Hardware

  • Power and Analog Applications. 2016. EMPA on behalf of Texas Instruments. 8 hours.

  • Mentor Graphics Workshop Day. 2015. CDT. 8 hours.

  • Mentor Graphics Workshop Day. 2014. CDT. 8 hours.

  • Mentor Graphics DxDesigner Training Course. 2014. CDT on behalf of Mentor Graphics. 20 hours.†

  • EMC Seminar. 2014. Würth Elektronik GmbH. 8 hours.†

  • Power Seminar. 2014. Linear Technology. 8 hours.†

Embedded/Software

  • Systems Programming and Advanced C Applications. 2025. C and System Programmers Association, Kaan Aslan. 510 hours.†

  • Unix and Linux Systems Programming. 2025. C and System Programmers Association, Kaan Aslan. 630 hours.†

  • A’dan Z’ye Docker. 2024. Udemy. 16.5 hours. Certificate

  • The Python Programming Language. 2024. C and System Programmers Association, Kaan Aslan. 225 hours.†

  • The C Programming Language. 2023. Plepa, Necati Ergin. 220 hours.†

  • Embedded Linux using Yocto. 2023. Udemy. 4.5 hours. Certificate

  • The C Programming Language. 2022. C and System Programmers Association, Kaan Aslan. 120 hours.†

  • FreeRTOS Real-Time Programming. 2018. Doulos. 24 hours.†

  • Developing with Embedded Linux. 2017. Doulos. 32 hours.†

  • The Programmable Logic Training Course Professional ZYNQ. 2016. PLC2. 40 hours.†

  • Basics of VxWorks. 2016. ASELSAN. 40 hours.

  • C6000 Embedded Design Workshop using BIOS. 2013. Texas Instruments. 40 hours.†

Digital/FPGA

  • Vivado Timing Constraints and Analysis. 2021. PLC2. 16 hours.†

  • Vivado HLS. 2016. PLC2. 8 hours.

  • The Programmable Logic Training Course Professional VHDL. 2016. PLC2. 40 hours.†

  • Easy Start FPGA. PLC2. 8 hours.

† Certificate available

Honor & Award

  • ASELSAN CTF (Capture The Flag) Contest, 2nd Place. 2022.

  • TUBITAK 2228-National MSc and PhD Scholarship Programme for Senior Undergraduate Students. 2012 - 2015.

  • Capstone Design Project Honorable Mention Award. 2011.

  • Bulent Kerim Altay Award. 2011.‡

  • Bulent Kerim Altay Award. 2011.‡

  • Bulent Kerim Altay Award. 2010.‡

  • Bulent Kerim Altay Award. 2010.‡

  • Bulent Kerim Altay Award. 2008.‡

  • Dean’s List. 2008 - 2011.

‡ About the award

Event

  • Embedded World. 2018. Nürnberg, Germany. Attendee

Membership

  • IEEE. Past

  • IEEE Robotics and Automation Society. Past

  • IEEE Signal Processing Society. Past

  • IEEE ODTÜ. Past

  • ODTÜ KTMT. Past

Activity

Trying playing various musical instruments. 🎵

Follow & Social Media

LinkedIn, mastodon, Twitter, GitHub, YouTube(in Turkish), Reddit, Stack Exchange (Overflow), Hackaday

Academic:

0000-0002-0904-9623, Google Scholar, E-7451-2019, Alper-Yazar

URL: https://www.alperyazar.com

Uptime Robot ratio (30 days)